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? semiconductor components industries, llc, 2008 august, 2008 ? rev. 8 1 publication order number: mc100el1648/d mc100el1648 5 v?ecl voltage controlled oscillator amplifier description the mc100el1648 is a voltage controlled oscillator amplifier that requires an external parallel tank circuit consisting of the inductor (l) and capacitor (c). a varactor diode may be incorporated into the tank circuit to provide a voltage variable input for the oscillator (vco). this device may also be used in many other applications requiring a fixed frequency clock. the mc100el1648 is ideal in applications requiring a local oscillator, systems that include electronic test equipment, and digital high ? speed telecommunications. the mc100el1648 is based on the vco circuit topology of the mc1648. the mc100el1648 uses advanced bipolar process technology which results in a design which can operate at an extended frequency range. the ecl output circuitry of the mc100el1648 is not a traditional open emitter output structure and instead has an on ? chip termination emitter resistor, r e , with a nominal value of 510 . this facilitates direct ac ? coupling of the output signal into a transmission line. because of this output configuration, an external pull ? down resistor is not required to provide the output with a dc current path. this output is intended to drive one ecl load (3.0 pf). if the user needs to fanout the signal, an ecl buffer such as the el16 (el11, el14) type line receiver/driver should be used. features ? typical operating frequency up to 1100 mhz ? low ? power 19 ma at 5.0 vdc power supply ? pecl mode operating range: v cc = 4.2 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 4.2 v to ? 5.5 v ? input capacitance = 6.0 pf (typ) ? pb ? free packages are available note: the mc100el1648 is not useable as a crystal oscillator. v ee v cc v cc v ee output agc bias point tank external tank circuit figure 1. logic diagram marking diagrams* soeiaj ? 14 m suffix case 965 1 14 14 1 *for additional marking information, refer to application note and8002/d. soic ? 8 d suffix case 751 tssop ? 8 dt suffix case 948r http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information kel1648 alywg 1648 alyw 1 8 1 8 1 8 k1648 alyw 1 8 dfn8 mn suffix case 506aa 6l m 14 a = assembly location l = wafer lot y = year w = work week m = date code g or = pb ? free package (note: microdot may be in either location)
mc100el1648 http://onsemi.com 2 13 14 12 11 10 9 8 2 1 34567 v cc nc tank nc bias nc v ee v cc nc out nc agc nc v ee bias tank v ee v cc v cc agc out figure 2. pinout assignments v ee 8 lead 14 lead warning: all v cc and v ee pins must be externally connected to power supply to guarantee proper operation. 123 7 4 5 6 8 table 1. pin description pin no. symbol description 8 lead 14 lead 1 table 2. attributes characteristic value internal input pulldown resistor n/a internal input pullup resistor n/a esd protection human body model machine model charged device model > 1 kv > 100 v > 1 kv moisture sensitivity, indefinite time out of drypack (note 1) pb pkg pb ? free pkg soic ? 8 tssop ? 8 soeiaj ? 14 dfn8 level 1 level 1 level 3 level 1 level 1 level 3 level 3 level 1 flammability rating oxygen index: 23 to 34 ul 94 v ? 0 @ 0.125 in transistor count 11 meets or exceeds jedec standard eia/jesd78 ic latchup test 1. for additional moisture sensitivity information, refer to application note and8003/d.
mc100el1648 http://onsemi.com 3 table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc power supply pecl mode v ee = 0 v 7 to 0 v v ee power supply necl mode v cc = 0 v ? 7 to 0 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 to 0 ? 6 to 0 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 8 soic ? 8 190 130 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm tssop ? 8 tssop ? 8 185 140 c/w c/w jc thermal resistance (junction ? to ? case) standard board tssop ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 14 soic ? 14 150 110 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 14 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c jc thermal resistance (junction ? to ? case) (note 1) dfn8 35 to 40 c/w stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc100el1648 http://onsemi.com 4 table 4. pecl dc characteristics v cc = 5.0 v; v ee = 0.0 v +0.8 / ? 0.5 v (note 2) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 13 19 25 13 19 25 13 19 25 ma v oh output high voltage (note 3) 3950 4170 4610 3950 4170 4610 3950 4170 4610 mv v ol output low voltage (note 3) 3040 3410 3600 3040 3410 3600 3040 3410 3600 mv agc automatic gain control input 1690 1980 1690 1980 1690 1980 mv v bias bias voltage (note 4) 1650 1800 1650 1800 1650 1800 mv v il 1.5 1.35 1.2 v v ih 2.0 1.85 1.7 v i l input current ? 5.0 ? 5.0 ? 5.0 ma note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. output parameters vary 1:1 with v cc . 3. 1.0 m impedance. 4. this measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point. table 5. necl dc characteristics v cc = 0.0 v; v ee = ? 5.0 v +0.8 / ? 0.5 v (note 5) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 13 19 25 13 19 25 13 19 25 ma v oh output high voltage (note 6) ? 1050 ? 830 ? 399 ? 1050 ? 830 ? 399 ? 1050 ? 830 ? 399 mv v ol output low voltage (note 6) ? 1960 ? 1590 ? 1400 ? 1960 ? 1590 ? 1400 ? 1960 ? 1590 ? 1400 mv agc automatic gain control input ? 3310 ? 3020 ? 3310 ? 3020 ? 3310 ? 3020 mv v bias bias voltage (note 7) ? 3350 ? 3200 ? 3350 ? 3200 ? 3350 ? 3200 mv v il ? 3.5 ? 3.65 ? 3.8 v v ih ? 3.0 ? 3.15 ? 3.3 v i l input current ? 5.0 ? 5.0 ? 5.0 ma note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. output parameters vary 1:1 with v cc . 6. 1.0 m impedance. 7. this measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
mc100el1648 http://onsemi.com 5 generic test circuits: bypass to supply opposite gnd figure 3. typical test circuit with alternate tank circuits 0.1 f c l 8 (10) 1 (12) 4 (3) v cc * use high impedance probe (>1.0 m must be used). ** the 1200 resistor and the scope termination impedance constitute a 25:1 attenuator probe. coax shall be ct ? 070 ? 50 or equivalent. 3 (1) 2 (14) c l 4 (3) v cc 3 (1) 2 (14) v in f out tank #1 8 (10) 1 (12) * note 1 capacitor for tank may be variable type. (see tank circuit #3.) note 2 use high impedance probe (> 1 m ). test point f out tank #2 tank circuit option #1, varactor diode tank circuit option #2, fixed lc l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = mmbv609 l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = 3.0 ? 35pf variable capacitance (@ 10 pf) 0.1 f0.1 f 0.1 f0.1 f 8 pin (14 pin) lead package 8 pin (14 pin) lead package ** 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f 1 k 50% t a t b v p-p prf = 1.0mhz duty cycle (vdc) - t a t b figure 4. output waveform
mc100el1648 http://onsemi.com 6 operation theory figure 5 illustrates the simplified circuit schematic for the mc100el1648. the oscillator incorporates positive feedback by coupling the base of transistor q6 to the collector of q7. an automatic gain control (agc) is incorporated to limit the current through the emitter ? coupled pair of transistors (q7 and q6) and allow optimum frequency response of the oscillator. in order to maintain the high quality factor (q) on the oscillator, and provide high spectral purity at the output, transistor q4 is used to translate the oscillator signal to the output dif ferential pair q2 and q3. figure 16 indicates the high spectral purity of the oscillator output (pin 4 on 8 ? pin soic). transistors q2 and q3, in conjunction with output transistor q1, provide a highly buffered output that produces a square wave. the typical output waveform can be seen in figure 4. the bias drive for the oscillator and output buffer is provided by q9 and q1 1 transistors. in order to minimize current, the output circuit is realized as an emitter ? follower buffer with an on chip pull ? down resistor r e . figure 5. circuit schematic agc v ee tank bias v ee v cc v cc q4 q3 q2 q1 q5 d1 q8 q7 q6 q9 q10 q11 d2 output 800 1.36 k 1.6 k 3.1 k 660 167 400 330 16 k 82 400 660 510 2 (14) 3 (1) 4 (3) 1 (12) 5 (5) 8 (10) 7 (8) 6 (7) 8 pin (14 pin) lead package
mc100el1648 http://onsemi.com 7 figure 6. low frequency plot figure 7. high frequency plot 0.1 f 1200* c l 8 (10) 1 (12) 4 (3) signal under test 10 f 0.1 f 3(1) 2 (14) tank #3 l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = 3.0 ? 35 pf variable capacitance (@ 10 pf) * the 1200 resistor and the scope termination impedance constitute a 25:1 attenuator probe. coax shall be ct ? 070 ? 50 or equivalent. 0.1 f 1200* c l 8 (10) 1 (12) 4 (3) signal under test 10 f 0.1 f 3(1) 2 (14) tank #3 l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = 3.0 ? 35 pf variable capacitance (@ 10 pf) * the 1200 resistor and the scope termination impedance constitute a 25:1 attenuator probe. coax shall be ct ? 070 ? 50 or equivalent. frequency (mhz) capacitance (pf) 25 20 15 10 5 0 0 300 500 1000 2000 10000 measured frequency (mhz) calculated frequency (mhz) frequency (mhz) capacitance (pf) 100 80 60 40 20 0 0 0.2 0.3 300 30 measured frequency (mhz) calculated frequency (mhz) 8 pin (14 pin) lead package 8 pin (14 pin) lead package 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f
mc100el1648 http://onsemi.com 8 fixed frequency mode the mc100el1648 external tank circuit components are used to determine the desired frequency of operation as shown in figure 8, tank option #2. the tank circuit components have direct impact on the tuning sensitivity, i ee , and phase noise performance. fixed frequency of the tank circuit is usually realized by an inductor and capacitor (lc network) that contains a high quality factor (q). the plotted curve indicates various fixed frequencies obtained with a single inductor and variable capacitor. the q of the components in the tank circuit has a direct impact on the resulting phase noise of the oscillator. in general, when the q is high the oscillator will result in lower phase noise. figure 8. fixed frequency lc tank frequency (mhz) capacitance (pf) 470 370 270 170 70 ? 30 0.3 300 500 1000 2000 10000 measured frequency (mhz) calculated frequency (mhz) 570 0 0.1 f c l 8 (10) 1 (12) 4 (3) v cc 3 (1) 2 (14) test point f out tank #2 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f 0.1 f 0.1 f note 1 capacitor for tank may be variable type. (see tank circuit #3.) note 2 use high impedance probe (> 1 m ). l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = 3.0 ? 35 pf variable capacitance (@ 10 pf) 8 pin (14 pin) lead package q l 100 only high quality surface ? mount rf chip capacitors should be used in the tank circuit at high frequencies. these capacitors should have very low dielectric loss (high ? q). at a minimum, the capacitors selected should be operating at 100 mhz below their series resonance point. as the desired frequency of operation increases, the values of the tank capacitor will decrease since the series resonance point is a function of the capacitance value. typically, the inductor is realized as a surface ? mount chip or a wound coil. in addition, the lead inductance and board inductance and capacitance also have an impact on the final operating point. the following equation will help to choose the appropriate values for your tank circuit design. f 0 1 2 l t *c t where l t = total inductance c t = total capacitance figure 9 and figure 10 represent the ideal curve of inductance/capacitance versus frequency with one known tank component. this helps the designer of the tank circuit to choose desired value of inductor/capacitor component for the wanted frequency. the lead inductance and board inductance and capacitance will also have an impact on the tank component values (inductor and capacitor). figure 9. capacitor value known (5 pf) inductance vs. frequency with 5 pf cap 5 10 15 20 25 30 35 40 45 50 0 700 1000 1300 160 400 frequency (mhz) inductance (nh) figure 10. inductor value known (4 nh) capacitance vs. frequency with 4 nh inductance 5 10 15 20 25 30 35 40 45 50 0 700 1000 1300 160 400 frequency (hz) capacitance (f)
mc100el1648 http://onsemi.com 9 voltage controlled mode the tank circuit configuration presented in figure 11, voltage controlled varactor mode, allows the vco to be tuned across the full operating voltage of the power supply. deriving from figure 6, the tank capacitor, c, is replaced with a varactor diode whose capacitance changes with the voltage applied, thus changing the resonant frequency at which the vco tank operates as shown in figure 3, tank option #1. the capacitive component in equation 1 also needs to include the input capacitance of the device and other circuit and parasitic elements. figure 11. voltage controlled varactor mode 50 70 90 110 130 150 170 190 024681 0 frequency (mhz) v in , input voltage (v) figure 12. plot 1. dual varactor mmbv609, v in vs. frequency c l 4 (3) v cc 3 (1) 2 (14) v in f out tank #1 8 (10) 1 (12) * 0.1 f0.1 f 5 (5) 6 (7) 7 (8) v ee 0.1 f 0.1 f 0.01 f 100 f ** 1 k *use high impedance probe (>1.0 meg must be used). **the 1200 resistor and the scope termination imped- ance constitute a 25:1 attenuator probe. coax shall be ct ? 070 ? 50 or equivalent. l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = mmbv609 8 pin (14 pin) lead package when operating the oscillator in the voltage controlled mode with t ank circuit #1 (figure 3), it should be noted that the cathode of the varactor diode (d), pin 8 (for 8 lead package) or pin 10 (for 14 lead package) should be biased at least 1.4 v above v ee . typical transfer characteristics employing the capacitance of the varactor diode (plus the input capacitance of the device, about 6.0 pf typical) in the voltage controlled mode is shown in plot 1, dual varactor mmbv609 v in vs. frequency. figure 6, figure 7, and figure 8 show the accuracy of the measured frequency with the different variable capacitance values. the 1.0 k resistor in figure 11 is used to protect the varactor diode during testing. it is not necessary as long as the dc input voltage does not cause the diode to become forward biased. the tuning range of the oscillator in the voltage controlled mode may be calculated as follows: f max f min c d (max) c s c d (min) c s where f min 1 2 l(c d (max) c s where c s = shunt capacitance (input plus external capacitance) c d = varactor capacitance as a function of bias voltage good rf and low ? frequency bypassing is necessary on the device power supply pins. capacitors on the agc pin and the input varactor trace should be used to bypass the agc point and the vco input (varactor diode), guaranteeing only dc levels at these points. for output frequency operation between 1.0 mhz and 50 mhz, a 0.1 f capacitor is suf ficient. at higher frequencies, smaller values of capacitance should be used; at lower frequencies, larger values of capacitance. at high frequencies, the value of bypass capacitors depends directly on the physical layout of the system. all bypassing should be as close to the package pins as possible to minimize unwanted lead inductance. several different capacitors may be needed to bypass various frequencies.
mc100el1648 http://onsemi.com 10 wave ? form conditioning ? sine or square wave the peak ? to ? peak swing of the tank circuit is set internally by the agc pin. since the voltage swing of the tank circuit provides the drive for the output buffer, the agc potential directly af fects the output waveform. if it is desired to have a sine wave at the output of the mc100el1648, a series resistor is tied from the agc point to the most negative power potential (ground if positive volt supply is used, ? 5.2 v if a negative supply is used) as shown in figure 13. at frequencies above 100 mhz typical, it may be desirable to increase the tank circuit peak ? to ? peak voltage in order to shape the signal into a more square waveform at the output of the mc100el1648. this is accomplished by tying a series resistor (1.0 k minimum) from the agc to the most positive power potential (+5.0 v if a positive volt supply is used, ground if a ? 5.2 v supply is used). figure 14 illustrates this principle. figure 13. method of obtaining a sine ? wave output 10 12 78 3 5 output +5.0vdc 114 figure 14. method of extending the useful range of the mc100el1648 (square wave output) 10 12 78 3 5 output +5.0vdc 114 1.0k min
mc100el1648 http://onsemi.com 11 spectral purity b.w. = 10 khz, center frequency = 100 mhz scan width = 50 khz/div, vertical scale = 10 db/div 99.8 99.9 100.0 100.1 100.2 figure 15. spectral purity 10 db / dec figure 16. spectral purity of signal output for 200 mhz testing 0.1 f 1200* c l 8 (10) 1 (12) 5 (5) 4 (3) signal under test 10 f 0.1 f 3(1) 2 (14) 6 (7) 7 (8) spectral purity test circuit tank #3 l = micro metal torroid #t20 ? 22, 8 turns #30 enameled copper wire (@ 40 nh) c = 3.0 ? 35 pf variable capacitance (@ 10 pf) ** the 1200 resistor and the scope termination impedance constitute a 25:1 attenuator probe. coax shall be ct ? 070 ? 50 or equivalent. 8 pin (14 pin) lead package v ee 0.1 f 0.1 f 0.01 f 100 f figure 17. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
mc100el1648 http://onsemi.com 12 ordering information device package shipping ? mc100el1648d soic ? 8, narrow body 98 units / rail mc100el1648dg soic ? 8, narrow body (pb ? free) 98 units / rail mc100el1648dr2 soic ? 8, narrow body 2500 / tape & reel mc100el1648dr2g soic ? 8, narrow body (pb ? free) 2500 / tape & reel mc100el1648dt tssop ? 8 100 units / rail mc100el1648dtg tssop ? 8 (pb ? free) 100 units / rail mc100el1648dtr2 tssop ? 8 2500 / tape & reel mc100el1648dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc100el1648m soeaij ? 14 50 units / rail mc100el1648mg soeaij ? 14 (pb ? free) 50 units / rail mc100el1648mel soeaij ? 14 2000 / tape & reel mc100el1648melg soeaij ? 14 (pb ? free) 2000 / tape & reel mc100el1648mnr4 dfn8 1000 / tape & reel MC100EL1648MNR4G dfn8 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100el1648 http://onsemi.com 13 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc100el1648 http://onsemi.com 14 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix plastic tssop package case 948r ? 02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-.
mc100el1648 http://onsemi.com 15 package dimensions soeiaj ? 14 case 965 ? 01 issue a h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.004 0.008 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z
mc100el1648 http://onsemi.com 16 package dimensions dfn8 case 506aa ? 01 issue d notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. ???? ???? ???? ???? a d e b c 0.10 pin one 2 x reference 2 x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 8 x a1 seating plane e/2 e 8 x k note 3 b 8 x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k 0.20 ??? l 0.25 0.35 1 4 8 5 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc100el1648/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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